Why Realtek 2.5G Switches Are Often 8+1 Instead of 8+2

An ACWiFi article dated 2026-03-15 asks why Realtek-based switches commonly appear as eight 2.5G ports plus one 10G port, while four 2.5G ports plus two 10G ports are possible.[6] The answer is in the number and type of high-speed interfaces exposed by the switch chip, not in simply drilling more holes in the case.[6]

RTL8373: why 8+1?

The source explains that an eight-port 2.5G switch uses RTL8373.[6] The chip has:[6]

• one USXGMII interface for a 10G port;[6]
• one 10G-QXGMII interface for a four-port 2.5G PHY chip.[6]

Because one path is allocated to the four-port PHY group, the design described by the article has only one external 10G branch left.[6] That makes 8+1 the natural configuration in this family rather than 8+2.[6]

RTL8372: why 4+2?

The four-port 2.5G RTL8372 has two USXGMII interfaces.[6] Those can feed two 10G ports, making 4+2 more practical.[6] ACWiFi also notes that RTL8373/RTL8373N and RTL8372/RTL8372N differ in package while being treated as equivalent in specifications for this discussion.[6]

What about 8+2?

The source names MXL86282C as a chip that can support an 8+2 layout through two USXGMII interfaces.[6] That does not mean every MXL switch shares the same firmware, throughput, or VLAN behavior; it explains why the design needs a chip with sufficient interfaces rather than a usual RTL8373 arrangement.[6]

When I evaluate a 2.5G switch, I look at the chip diagram, PHY count, uplink interface type, and flash/firmware.[6] Two ports marked “10G” can travel through different branches, while the 2.5G port count alone says nothing about switching capacity or packet buffering.[6]

Limits of the analysis

The ACWiFi article does not provide throughput benchmarks, a VLAN table, thermal data, or firmware results for a particular model.[6] This explanation is therefore useful for reading a BOM and port layout; it is not enough to rank Realtek against MXL or promise that an 8+1 switch will outperform 4+2 in every workload.[6]

Conclusion

The difference between 8+1, 4+2, and 8+2 comes from internal interfaces: RTL8373 allocates one USXGMII to 10G and one 10G-QXGMII to the PHY group, RTL8372 exposes two USXGMII interfaces, and the source mentions MXL86282C for 8+2.[6] That is the chip-architecture check I make before reading marketing numbers.[6]

Source

Original source: [为什么螃蟹没有“8+2”的2.5G交换机？]¹, published/updated 2026-03-15.[6]

Sources

[6] https://www.acwifi.net/33625.html — 为什么螃蟹没有8+2的2.5G交换机